1. Field of the Invention
The present invention relates to methods, systems, and computer programs for facilitating dielectric etching of a semiconductor device, and more particularly, methods, systems, and computer programs for facilitating negative ion control in a capacitively-coupled plasma (CCP) chamber.
2. Description of the Related Art
The manufacturing of integrated circuits includes immersing silicon substrates (wafers) containing regions of doped silicon into chemically-reactive plasmas, where the submicron device features (e.g., transistors, capacitors, etc.) are etched onto the surface. Once the first layer is manufactured, several back-end insulating (dielectric) layers are built on top of the first layer, where holes (also referred to as vias) and trenches are etched into the material for placement of the conducting interconnectors.
SiO2 is a common dielectric used in semiconductor manufacturing. The plasmas used for SiO2 etching often include fluorocarbon gases such as carbon tetrafluoride CF4 and otafluorocyclobutane (C—C4F8), along with argon (Ar) and oxygen (O2) gases. The word plasma is used to refer to those gases in which the constituent atoms and molecules have been partially or wholly ionized. Capacitive radio frequency (RF) power coupling is often used for striking and sustaining the plasma because of the low dissociation rates obtained, favoring larger passivating molecules and high ion energies at the surface. To obtain independent control of the ion energy and the ion flux to the silicon substrate, dual frequency capacitive discharges (DF-CCP) are sometimes used.
Etching of the wafer is often performed by positive ions when the positive ions escape from the plasma and strike the feature to be etched. Some etching methods also rely on negative-ion etching by pulsing the plasma, i.e. having periods were the RF power supply is turned off, which enables the escaping of negative ions from the plasma during the off period of the RF (also referred to as the afterglow). However, pulsing the RF power supply is not an efficient way of etching, because the plasma is being created and dissipated in each cycle.
It is in this context that embodiments arise.